Rasha is a postdoctoral researcher at University of South Carolina. Beside, her research work, Rasha is the main instructor of embedded systems and computer architecture courses at Department of Computer Science and Engineering. Her primary research area is reconfigurable computing, embedded systems and application-specific architecture, specifically FPGA.

Lizy Kurian John is B. N. Gafford Professor in the Electrical and Computer Engineering at UT Austin. She received her Ph. D in Computer Engineering from the Pennsylvania State University. Her research interests include workload characterization, performance evaluation, architectures with emerging memory technologies such as die-stacked DRAM, and high performance processor architectures for emerging workloads. She is recipient of NSF CAREER award, UT Austin Engineering Foundation Faculty Award, Halliburton, Brown and Root Engineering Foundation Young Faculty Award 2001, University of Texas Alumni Association (Texas Exes) Teaching Award 2004, The Pennsylvania State University Outstanding Engineering Alumnus 2011, etc. She has coauthored a book on Digital Systems Design using VHDL (Cengage Publishers, 2007, 2017), a book on Digital Systems Design using Verilog (Cengage Publishers, 2014) and has edited 4 books including a book on Computer Performance Evaluation and Benchmarking. She is in ISCA and HPCA Hall of Fame, holds 10 US patents and is a Fellow of IEEE.

Dr. Swapnita Srivastava is a highly accomplished researcher and educator in the field of computer science and engineering. With a Ph.D. in Cache Memory from Madan Mohan Malaviya University of Technology, Gorakhpur, she has made significant contributions to optimizing cache replacement policies using machine learning techniques. Her expertise extends to teaching and she has served as an Assistant Professor at prestigious institutions such as G L Bajaj Institute of Technology and Management and Galgotias University. Her research prowess is evidenced by her extensive publication record, including articles in renowned journals and presentations at international conferences. She is also a patent holder and has actively participated in faculty development programs and workshops. With a strong foundation in technical skills and a passion for research, she continues to make valuable contributions to the field of computer science.

Yasuko Eckert is a Sr. Member of Technical Staff at AMD Research and an IEEE Senior Member. She received her M.S. and Ph.D. from the University of Wisconsin-Madison in 2007 and 2011, respectively. She received her B.S. from the University of Texas at Austin in 2004. Her research interests include SoC- and package-level architectural optimizations, 3D integration, energy-efficient computing, and microarchitecture designs. She is currently serving as the Tutorial/Workshop Co-chair of the 51st International Symposium on Microarchitecture, as well as an Associate Editor of IEEE Transactions on Multi-Scale Computing Systems (TMSCS). She has served on the Technical Program Committees of MICRO, HPCA, PACT, ISLPED, and ICCD. She holds more than 25 U.S. patents.